genRTL Docs
Public product docs for digital front-end / FPGA workflows

Public product docs

Covers user-facing workflows only, not internal orchestration or private implementation details.

简体中文

FAQ

FAQ

These are the questions most users ask first when they start using genRTL seriously.

Why did genRTL not generate the code I expected?

Usually because the task was underspecified, the reviewed plan was missing, or reuse was a better fit than fresh generation. Start by reviewing the request scope and the design plan.

Why did debug not converge quickly?

Debug Mode improves when it receives concrete evidence. Provide compile errors, assertion output, simulation messages, and concise context around the failing area.

Why does genRTL recommend assertions so often?

Because assertions often make hardware bugs easier to locate and faster to repair, especially for protocol and control logic.

Why was a reusable block recommended?

Because reusing a mature block is often safer and faster than regenerating a known pattern from scratch.